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Superconductor Electronics Fabrication Process with MoNx Kinetic Inductors and Self-Shunted Josephson Junctions

I. INTRODUCTION
THERE has been a continuing progress in superconductor electronics fabrication towards increasing the number of superconducting layers and reducing the minimum size of circuit features [1]-[5]. A breakthrough into a very large scale integration (VLSI) of superconducting digital circuits has recently been made as a result. For instance, single flux quantum (SFQ) circuits containing close to one million Josephson junctions  (JJs) and having circuit density over 1.3∙106 JJs per cm2 have been demonstrated [6],[7] using the 350-nm fabrication process SFQ5ee developed at MIT Lincoln Laboratory (MIT LL) [2]. This process utilizes resistively shunted Nb/AlOx"Al/Nb Josephson junctions with critical current density Jc = 0.1 mA/μm2 and geometrical inductors formed on multiple superconducting wiring layers of niobium. Currently, it is perhaps the most advanced fabrication process for superconductor electronics, with a theoretical maximum circuit density of about 4∙106 JJs per cm2 [8],[9]. However, further increase of the integration scale of SFQ circuits is challenging because of the large area of individual SFQ cells, mainly determined by the area of JJ shunt resistors and geometrical inductors [8].

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